Characterization of MoS2 Back Gate FET by using Solid CVD with Pd Contact Electrode for Monolayer Ultra-Thin Body Transistor

　　In this thesis, we dedicate to the novel two-dimensional materials – MoS2. Owing to the high resistance interface between MoS2 and metal contact, we focus on this topic to discuss. MoS2 is used as channel material to fabricate the back gate field effect transistor. By comparing the behavior between Pt, Ti, W and Pd metal contact, we analyze the electrical results and calculate the electrical performance to choose the best metal electrode we can use in the future. 　　In the process of fabrication, there are three main methods to deposit MoS2 film -exfoliation, molecular beam epitaxy and chemical vapor deposition. Due to the fact that it is steady and has large area of deposition, we deposit the MoS2 film by chemical vapor deposition. It was about 6~8 layers, and the thickness is 0.63nm. Then, the deposition of the metal was done by sputter for thickness of 150nm. Gate length is in micro scale. At last, we use simple and quick lift-off process to complete the metal electrode. The back gate FET would be fabricated. 　　After finishing the fabrication of the device, we measure the electrical results and illustrate the Id-Vd and Id-Vg electrical characteristic to compare the performance of the device. Since the yield is low with Pt electrode, it is hard to fabricate. Though the device can be partly fabricated with Ti electrode, the performance of device is poor. It is high yield with W and Pd electrode. They have great performance in device operation, especially Pd. In 10µm channel length, the on current can attain 7.94×10-7(A/µm) at 5V operation bias. The on/off ratio achieve 103~104. It has good ability in operation. Pd electrode has potential in application in the future.