Fabrication and low temperature characterization of Ge (110) and (100) p-MOSFETs
Journal
IEEE Transactions on Electron Devices
Journal Volume
61
Journal Issue
6
Pages
2215-2219
Date Issued
2014
Author(s)
Abstract
The Ge p-MOSFETs on (110) substrates using two-step implantation and NiGe contacts have been demonstrated. The record peak mobility of 528 cm 2 /V·s of the (110) Ge device is measured by the spilt C-V method and can be further enhanced by proper stress. Ge p-FETs on (110) substrates have lower mobility enhancement than (100) devices under compressive strain along the channel. The peak mobility decreases with decreasing temperature due to impurity scattering. The larger density of interface states causes the larger threshold voltage shift from the room temperature to 100 K as compared with Si MOSFETs.
SDGs
Type
journal article