Publication:
A single-PLL UWB frequency synthesizer using multiphase coupled ring oscillator and current-reused multiplier

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Date

2009-02

Authors

Jung-Yu Chang
Jung-Yu Chang;Che-Wei Fan;Che-Fu Liang;Shen-Iuan Liu
Che-Wei Fan
Che-Fu Liang
SHEN-IUAN LIU

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Research Projects

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Abstract

A single phase-locked loop (PLL) frequency synthesizer for a Mode-1 multiband orthogonal frequency-division multiplexing (MB-OFDM) ultrawideband (UWB) system is realized in 0.13-μmu CMOS. A current-reused multiply-by-1.5 circuit and a multiphase coupled ring oscillator are adopted to reduce the power consumption. For a 4.488-GHz signal, the measured image sideband is -40 dBc. The measured switching time from 3.342 to 4.488 GHz is 1.5 ns. The area is 0.85 × 0.9 mm2 and the power is 31.2 mW for a 1.2-V supply voltage. © 2009 IEEE.

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Keywords

Current reused; Multiply-by-1.5 circuit; Phase-locked loop (PLL); Ring oscillator; Ultrawideband (UWB)

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