A process for the formation of submicron V-gate by micromachined V-grooves using GaInP/GaAs selective etching technique
Journal
IEEE Electron Device Letters
Journal Volume
22
Journal Issue
9
Pages
420-422
Date Issued
2001
Author(s)
Abstract
A process for the formation of submicron V-gates by V-grooves was demonstrated for the first time. The fabrication steps of V-gates consist of anisotropic wet etching of the undoped GaAs layer grown on top of a GaInP layer and subsequent metal evaporation and lift-off process. Owing to the outward slope of the sidewalls of the micromachined V-groove, submicron gate length could be easily obtained by normal 1 μm UV photolithography. The submicron V-gate process was also applied successfully to the fabrication of V-gate GaInP/GaAs/InGaAs metal semiconductor field effect transistors with a gate length of 0.6 μm.
Type
journal article