Modeling, Analysis, and Design for Bends and Signal Traces Crossing Slot Discontinuities of Differential Transmission Lines
Date Issued
2006
Date
2006
Author(s)
Shiue, Guahg-Hwa
DOI
en-US
Abstract
While the high-speed computer design is toward increasing the bus speeds between components on a Printed Circuit Board (PCB), it faces many new problems the Signal Integrity (SI) and Electromagnetic Compatibility (EMC) issues concerned in the performance margin and requirement. In favor of the low-noise generation and high common-mode noise immunity, the differential signaling has become a popular option for multi-gigabit digital applications. To take the advantages of this design scheme, the differential discontinuities through the signaling interconnection are needed to be characterized and
constructed into the feasible models accordingly.
In this dissertation, a more general approach for de-embedding the strongly coupled differential transmission-line effect is thus developed to extract its lumped equivalent circuit model. Furthermore, an efficient scheme by combining the one-dimensional transmission-line model with the two-dimensional Finite-Difference Time-Domain (FDTD) analysis is extended to simulate the signal and power integrity issues. For the former part, signal integrity effects in the signal level using differential bends are chosen as an example. For the latter part, the signal propagation flowing on differential
microstrip lines above a split power-ground plane serves as an example.
The signal integrity analyses for bent differential transmission lines in a high-speed digital circuit are therefore performed in the time domain. Two practical compensation schemes, the dual back-to-back bends and bend with a detour, for the common-mode noise reduction are further investigated. To alleviate the common-mode noise at the receiver, a novel compensation scheme in use of the shunt capacitance is also proposed. Furthermore, the comparison between the simulation and measured results validates the equivalent circuit model, coupled bends with a compensation capacitance patch, and analysis
approach.
This dissertation also investigates the noise reduction in the slot-induced ground bounce noise by using the differential signaling. An efficient 2D FDTD method together with the equivalent circuits for both the differential lines and the slot is established and simulations are performed for a three-layer structure to characterize the ground bounce coupling. A simple model is then proposed to understand how the differential-coupled microstrip lines can help reduce the ground bounce. Different factors that affect the noise reduction are investigated, such as the coupling coefficient, rising time, skew of differential signaling, and structure asymmetry in the slotline. An experiment is setup to demonstrate the noise coupling between signal lines due to the slot-induced ground bounce and how the significant noise reduction is achieved by employing the differential signaling. Finally, the favorable comparison between the simulation and measured results concludes the proposed equivalent circuit model and
analysis approach.
Subjects
信號完整度
電磁相容
共模雜訊
差模信號
差模轉角
槽線
Signal Integrity
Electromagnetic Compatibility
common-mode noise
differential signaling
differential Bends
slotline
Type
thesis
File(s)![Thumbnail Image]()
Loading...
Name
ntu-95-D90942002-1.pdf
Size
23.31 KB
Format
Adobe PDF
Checksum
(MD5):ac3411853d54be2bc257bde0b4e16aae