Low Power CMOS RSSI for Optical Receiver and A Compensation Method for Process and Temperature Variations
Date Issued
2013
Date
2013
Author(s)
Shih, Hung-Yang
Abstract
The Ethernet transmits a lot of data nowadays, but back-up or self-healing mechanism is not much specified in the Ethernet standard. Signal monitoring is necessary in the physical layer.
Received signal strength indication (RSSI) is one of the methods to monitor signal quality. Two versions of RSSI are investigated and designed in this thesis. Both are fabricated in 0.18 μm 1P6M CMOS process. The first version is a low power logarithmic amplifier. Based on the traditional piecewise linear logarithmic amplifier, we design a novel cyclic logarithmic amplifier, and reduce its DC offset and flicker noise by using a chopper. With 30 dB dynamic range and ±1.1 dB linearity error, it consumes 1.13 mW. Temperature ranging from 〖-20〗^o C to 〖50〗^o C induces +4/-2 dB variation.
The second version is a 80 dB logarithmic amplifier with process and temperature compensation. A high linearity limiting amplifier is designed for this logarithmic amplifier to achieve wide dynamic range. An adder and a variable gain amplifier separately shifts and rotates the characteristic curve of the logarithmic amplifier to get consistent output under process and temperature variation (-20^o C~〖70〗^o C). Post-layout simulation shows that the linearity error is ±0.9 dB with process and temperature variation induced error of +1/-1.6 dB. The power consumption is 1.55 mW.
Subjects
接收信號強度指標
光接收機
光二極體
對數放大器
互補式金氧半場效電晶體
低功耗
製程與溫度補償
Type
thesis
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