Nearly defect-free Ge gate-all-around FETs on Si substrates
Journal
International Electron Devices Meeting, IEDM
Date Issued
2011
Author(s)
Abstract
The p-channel triangular Ge gate-all-around (GAA) FET with fin width (Wfin) of 52nm and Lg of 183nm has Ion/Ioff =105, SS= 130mV/dec, and Ion=235 µA/µm at −1V. Performance can be further improved if superior gate stack than EOT=5.5 nm and Dit=2×1012 cm−2eV−1 is used. A novel process to etch away the high defect Ge near Ge/Si interface from blanket Ge grown on SOI can solve the loading effect in the selective growth, achieve better gate control by GAA with larger effective width (Weff) than rectangular fin, and have low punch-through current through the Si substrate due to the oxide under the Ge channel and the valence band discontinuity at the Ge S/D and Si interface. By dislocation removal, the defect-free Ge channel can be formed on nothing.
Type
conference paper