Evaluation of Stabilit, Performance of Ultra-Low Voltage MOSFET, TFET, and Mixed TFET-MOSFET SRAM Cell With Write-Assist Circuits
Journal
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
Journal Volume
4
Pages
389-399
Date Issued
2014
Author(s)
Y.-N. Chen
M.-L. Fan
V. P.-H. Hu
Pin Su
C.-T. Chuang
Y.-N. Chen
M.-L. Fan
V. P.-H. Hu
Pin Su
C.-T. Chuang
Abstract
In this work, we propose a mixed TFET-MOSFET 8T SRAM cell comprising MOSFET cross-coupled inverters, dedicated TFET read stack and TFET write access transistors for ultra-low voltage operation. Exploiting both the merits of TFET and MOSFET devices, the proposed SRAM cell provides significant improvement in SRAM stability, Vmin and performance. The stability and performance of the proposed cell are evaluated and compared with the conventional MOSFET 8T cell and pure TFET 8T cell using mixed-mode TCAD simulations based on published design rules for 22 nm technology node. Besides, the impacts of the device design of the proposed SRAM cell on the stability are also investigated. Various write-assist techniques to enhance the write-ability across VDD= 0.2 to 0.7 V for these SRAM cells are comparatively assessed. The results indicate that the proposed mixed TFET-MOSFET cell topology is viable for ultra-low voltage operation while MOSFET cell provides better stability and performance for high voltage operation.
SDGs
Type
journal article