A fast and power-saving self-timed Manchester carry-bypass adder for Booth multiplier-accumulator design
Resource
Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on
Journal
Advanced System Integrated Circuits 2004
Pages
Proceeding-s
Date Issued
2004-08
Date
2004-08
Author(s)
Wey, I-Chyn
Chow, Hwang-Cherng
Chen, You-Gang
Wen, An-Yeu
DOI
N/A
Abstract
In this paper, a fast and power-saving self-timed Manchester Carry-Bypass Adder (MCBA) is proposed based on the property analysis of the MCBA completion signal. By using a new self-timed approach, the critical path in the summation array of Multiplier-Accumulator (MAC) can be removed without conventional dual MCBA chain circuit. As a result, the speed of the proposed self-timed MCBA can be improved 23.3% and save 56.8% power consumption. Finally, a 16-bit 16-bit+40-bit Booth MAC with this new self-timed MCBA is demonstrated at 2.5V, 150MHz in UMC 0.25/spl mu/m process with 71.28mW power only.
SDGs
Type
journal article
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