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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
One-Dimensional Systolic Array Architecture for Neural Network
Details
One-Dimensional Systolic Array Architecture for Neural Network
Date Issued
-01
Author(s)
T.D. Chiueh
H.T. Chang
TZI-DAR CHIUEH
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/366923
Type
patent