Channel Shortening Equalizer Algorithm and VLSI Architecture for MIMO-OFDM Systems
Date Issued
2011
Date
2011
Author(s)
Feng, Shao-Wei
Abstract
With the popular application of wireless local area network (WLAN), there is an increasing demand for bandwidth by the users. Some existing WLAN specifications cannot provide adequate transmission rate gradually. The main purpose of IEEE 802.11n WLAN standard is to provide a higher transmission rate to meet present and future bandwidth requirements. The difference between IEEE 802.11n and previous standards is the use of multiple input multiple output (MIMO) technique combining with OFDM which causes substantially improvement of transmission rate.
In orthogonal frequency division multiplexing (OFDM) systems, a time-domain equalizer (TEQ) is used to reduce the inter-symbol interference (ISI) by shortening the channel impulse response when the channel length is larger than cyclic prefix (CP) length. However, conventional channel shortening methods may have frequency notch problem which will cause performance degradation.
In this thesis, we propose a channel shortening algorithm to effectively mitigate the frequency notch effect. Besides, we also extend the proposed algorithm to MIMO environment with joint channel shortening technique. The simulation results show that the proposed algorithm has the best system performance in the MIMO-OFDM system as compared with other channel shortening algorithms.
We use the delay estimate method, matrix property and Gauss-Seidel iterative method to reduce the high computation complexity TEQ design. The proposed TEQ algorithm architecture can provide SISO to MIMO environment and the one TEQ can be shared for other receivers with only twenty complex multipliers by folding technique. Finally, the TEQ engine is implemented in UMC90 40 MHz with 1.91 mm2. And it can provide the MIMO environment from 1X1 to 4X4.
Subjects
MIMO
OFDM
Time domain equalier
channel shortening
frequency notch
Type
thesis
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