A fully differential comparator-based switched-capacitor ΔΣ modulator
Journal
IEEE Transactions on Circuits and Systems II: Express Briefs
Journal Volume
56
Journal Issue
5
Pages
369-373
Date Issued
2009-05
Author(s)
Mu-Chen Huang
Abstract
In this brief, a fully differential comparator-based switched-capacitor (CBSC) second-order delta-sigma (ΔΣ) modulator is presented. To ensure differential operation, the CBSC ΔΣ modulator utilizes a common-mode feedback circuit to balance the pull-up current and the pull-down current in the ramp generator. This modulator has been fabricated in a standard 0.18-μm CMOS process. The active area is 0.21 mm2, and the power consumption, excluding output buffers, is 0.42 mW from a 1.8-V supply. This modulator achieves 65.3-dB signal-to-noise-plus-distortion ratio and an input dynamic range of 71 dB when sampled at 2.56 MS/s (OSR = 64). © 2009 IEEE.
Type
journal article
