Design of Energy-Efficient Wireless Transmitters
Date Issued
2012
Date
2012
Author(s)
Lin, Chun-Yu
Abstract
In the wireless communication system, low power and high efficiency are major concern, and this thesis proposes a modulation architecture which can achieve low power and high data rate requirement. For a traditional mixer-based transmitter architecture, the DACs, filters, and mixers consume large power under high data rate and induce many non-idealities of analog circuits. The core of the proposed modulation architecture is a phase selector, which replaces these analog circuits and achieves low-power performance. Furthermore, the open loop characteristic facilitates the high data rate operation.
The first work is a 2.4-GHz wireless transmitter, which adopts phase selector technique and can support OQPSK, HS-OQPSK, 8-PSK, and 16-QAM modulation. This chip is fabricated in a 90-nm CMOS process. The experimental results show that the transmitter delivers 105-Mbps maximum data rate under -3 dBm output power. The EVM is lower than 10.6 %, and the total power consumption of the transmitter is 9.25 mW under a 1.2-V supply. The second work is improved from the first work. The improvement includes the FIR digital spur reducing and enhancing accuracy in 16-QAM modulation.
The third work is for bio-medical wireless application. This work can achieve low power and high data rate by using edge combining and phase selector technique. This chip is fabricated in a 0.18-um CMOS process. The transmitter consumes 300 uW at 15 Mbps from a 0.8-V supply.
Subjects
Phase Selector
HS-OQPSK modulation
Edge-combining technique
Type
thesis
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