Achieving Fast Load Transient Response Using Digital Control in a DC Converter
Date Issued
2010
Date
2010
Author(s)
Chiu, Bo-Yi
Abstract
To power a central processor unit (CPU) of a computer, a voltage regulator(VR) must not only provide a well-regulated voltage during the steady- state load but also maintain a small voltage spike/dip with fast transient voltage recovery during step-load changes. These VR features are very important to achieve the power requirements of modern-day energy-saving CPUs. The focus of the thesis is to investigate a voltage fast-recovery scheme, called time-optimum control (TOC), for dealing with the frequent step-load transient of a CPU. The idea is that the VR can be controlled by two control loops, one is the linear feedback scheme which is used during steady-state load and the other is the TOC scheme, which takes over and speeds up the recovery when load transient occurs. A digital control technique was employed for both control loops to accomplish such a challenging task.
In the thesis, conventional TOC controls including the so-called voltage-based and the time-based control, was be reviewed first. The basic principle of all TOC technique, the output capacitor charge balance, was explained. The algorithm for a fast recovery is for the converter main switch to turn on or turn off for a predicted time instead of still using pulse-width modulation during the transient. The algorithm for calculating the predicted time is so complicated mathematically that it is normally implemented by digital means. However, the two conventional algorithm mentioned above fail to accomplish the purpose when the output capacitor parasitic resistance is significant, which is true for many practical electrolytic capacitors. In the thesis, a new algorithm was proposed to solve the problem. This algorithm is based on using the slope of the output voltage for predicting the necessary one-shot on time of the main switch. The theory and the mathematic involved were explained. Simulation and hardware experiments were run to verify the proposed algorithm. An open feedback loop test proved that the algorithm is valid. Future work along this line is suggested for future research.
Subjects
Voltage Regulator
Digital Control
Time-Optimal Control
Step Load Change
Fast Transient Response
Type
thesis
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