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  4. An efficient EPIST algorithm for global placement with non-integer multiple-height cells
 
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An efficient EPIST algorithm for global placement with non-integer multiple-height cells

Journal
Proceedings - Design Automation Conference
Journal Volume
2020-July
Date Issued
2020
Author(s)
Chen, J.
Huang, Z.
Huang, Y.
Zhu, W.
Yu, J.
YAO-WEN CHANG  
DOI
10.1109/DAC18072.2020.9218504
URI
https://www.scopus.com/inward/record.url?eid=2-s2.0-85093983445&partnerID=40&md5=dfef7cc86781e9f312ff8a0979ebf5a7
https://scholars.lib.ntu.edu.tw/handle/123456789/559313
Abstract
With the increasing design requirements of modern circuits, a standard-cell library often contains cells of different row heights to address various trade-offs among performance, power, and area. However, maintaining all standard cells with integer multiples of a single-row height could cause some area overheads and increase power consumption. In this paper, we present an analytical placer to directly consider a circuit design with non-integer multiple-height standard cells and additional layout constraints. The region of different cell heights is adaptively generated by the global placement result. In particular, an exact penalty iterative shrinkage and thresholding (EPIST) algorithm is employed to efficiently optimize the global placement problem. The convergence of the algorithm is proved, and the acceleration strategy is proposed to improve the performance of our algorithm. Compared with the state-of-the-art works, experimental results based on the 2017 CAD Contest at ICCAD benchmarks show that our algorithm achieves the best wirelength and area for every benchmark. In particular, our proposed EPIST algorithm provides a new direction for effectively solving large-scale nonlinear optimization problems with non-smooth terms, which are often seen in real-world applications. © 2020 IEEE.
Other Subjects
Cells; Computer aided design; Cytology; Economic and social effects; Integrated circuit manufacture; Nonlinear programming; Acceleration strategies; Circuit designs; Global placements; Iterative shrinkages; Large scale nonlinear optimization; Layout constraint; Standard cell; State of the art; Iterative methods
Type
conference paper

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