Modern Floorplanning Based on B?-Tree and Fast Simulated Annealing
Resource
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 25, NO. 4, APRIL 2006
Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Journal Volume
VOL. 25
Journal Issue
NO. 4
Pages
-
Date Issued
2006-04
Date
2006-04
Author(s)
Chen, Tung-Chieh
DOI
246246/200611150121534
Abstract
Unlike classical floorplanning that usually handles
only block packing to minimize silicon area, modern very large
scale integration (VLSI) floorplanning typically needs to pack
blocks within a fixed die (outline), and additionally considers
the packing with block positions and interconnect constraints.
Floorplanning with bus planning is one of the most challenging
modern floorplanning problems because it needs to consider the
constraints with interconnect and block positions simultaneously.
In this paper, the authors study two types of modern floorplanning
problems: 1) fixed-outline floorplanning and 2) bus-driven
floorplanning (BDF). This floorplanner uses B∗-tree floorplan
representation based on fast three-stage simulated annealing (SA)
scheme called Fast-SA. For fixed-outline floorplanning, the authors
present an adaptive Fast-SA that can dynamically change
the weights in the cost function to optimize the wirelength under
the outline constraint. Experimental results show that this floorplanner
can achieve 100% success rates efficiently for fixed-outline
floorplanning with various aspect ratios. For the BDF, the authors
explore the feasibility conditions of the B∗-tree with the bus constraints,
and develop a BDF algorithm based on the conditions and
Fast-SA. Experimental results show that this floorplanner obtains
much smaller dead space for the floorplanning with hard/soft
macro blocks, compared with the most recent work. In particular,
this floorplanner is more efficient than the previous works.
Subjects
Floorplanning
physical design
Publisher
Taipei:National Taiwan University Grad Inst Elect Engn
Type
journal article
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