Design of CMOS Frequency Synthesizer for MB-OFDM UWB Systems
Date Issued
2005
Date
2005
Author(s)
Chen, Chih-Hao
DOI
en-US
Abstract
Recently, UWB is the one of the most popular systems. Under the trend of future integration of WPAN, UWB system is the best solution undoubtedly. Though the standard of UWB is not finalized, MB-OFDM UWB system has been the standard of next generation wireless USB. The bandwidth of MB-OFDM UWB from 3432 to 10296 MHz is divided into 14 sub-bands. The proposed transceivers for UWB are only operated in band # 1 to band # 3 so far. For MB-OFDM UWB system, a frequency synthesizer to generate clocks for 14 sub-bands will be beneficial to the realization of UWB transceiver for all sub-bands.
This thesis presents two chips for MB-OFDM UWB system and a chip for future high-speed transmission. The first chip is VCO for the frequency between band # 3 and # 4 in MB-OFDM UWB system with 0.18μm 1P6M CMOS. The simulation shows the chip can generate oscillation signals in 4752 MHz. The chip area is 955 X 831 μm2. The power consumption is 13.8 mW under 1.8V power supply.
The second chip is a multi-phase VCO operated in 40 GHz in simulation. It was fabricated in 0.18μm 1P6M CMOS. The chip occupies area of 1180 X 801 μm2 . It can provide eight phase oscillation signals under 1.8V power supply, and consume 16mW.
The final chip is a frequency synthesizer whose generated clocks can demand the all 14 sub-bands in MB-OFDM UWB system. With proposed architecture and injection-locked band-selection enhancer, the synthesizer can provide clocks in all 14 bands and band selection by external signals.
It was achieved in 0.18μm 1P6M CMOS. The occupied area is, and the synthesizer consumes 95 mW under 1.8V power supply. Former two chips are verified by post-simulation. The considerations of testing and measurement results of them will be shown and discussed.
Subjects
超寬頻
頻率合成器
Ultra-Wideband Systems
Frequency Synthesizer
Type
thesis
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