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  4. Analysis of 4H-SiC MOS Capacitor under High Temperature Measurement with High-k Gate Dielectrics:Y2O3
 
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Analysis of 4H-SiC MOS Capacitor under High Temperature Measurement with High-k Gate Dielectrics:Y2O3

Date Issued
2014
Date
2014
Author(s)
Chang, Yu-Hao
URI
http://ntur.lib.ntu.edu.tw//handle/246246/260935
Abstract
In this research, Y2O3 film was deposited on carbon(C)-face 4H-SiC substrates by using a RF sputter. Then Y2O3 films were treated with RTA (rapid thermal annealing) process in vaccum ambient at 300℃, 400℃, 500℃ and 600℃, respectively for five minutes. Finally, we deposited the aluminum as the gate metal   In the experiment, we investigate the relationship between the effects of post-deposition annealing on the Y2O3 thin film structure and the gate leakage current. By the C-V, and I-V measurement at the high temperature measurement, we calculate the interface trapped density, dielectric constant and the shift of flat-band voltage. Then, we can discuss the insulator quality, interface defects and oxide charge.   The Y2O3 film shows the lower leakage currents at the annealing temperature of 400℃. Comparing with samples with no RTA process, the anneal samples with the anneal treatment display the lower flat-band voltage shift because the oxide charge in the insulator have been improved. However, the interface traps is not reduced due to the vacuum annealing. The dielectric breakdown field with no annealing process is about 1.3 MV/cm. As the annealing temperature reach to 600℃, the dielectric breakdown field increase to 3.1 MV/cm. The result shows dielectric strength have been improved under the annealing process.
Subjects
金氧半電容
4H碳化矽
氧化釔
快速熱退火
X光粉末繞射儀
Type
thesis
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ntu-103-R00525067-1.pdf

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