Digital I/Q Imbalance Compensation Technique in Multicarrier Low-IF Receiver
Date Issued
2004
Date
2004
Author(s)
Huang, Hun-Ti
DOI
en-US
Abstract
I/Q imbalance appears in all I/Q communication systems. Process variation in the analog front-end of the receiver will cause mismatches in the components. Gain and phase mismatches between I and Q mixers are unavoidable. The capacitor mismatches in analog-to digital converters also cause this problem. I/Q imbalance problem causes finite rejection in the image frequency band, and the image interference will alias into the desired signal, severe distortion will occur.
In this work, a novel and feasible I/Q imbalance compensation technique is proposed. A sign-sign LMS algorithm is used to detect the imbalance of the analog front-end. After that, two multipliers and a DDFS (Direct Digital Frequency Synthesizer) are employed to perform high precision amplitude and phase imbalance compensation. In this work, the analog front end is simulated by Advanced Design System and the digital compensation architecture is simulated by Matlab Simulink. Simulation results show that this architecture can eliminate I/Q imbalance almost completely without disturb the desired signal. Comparisons between this algorithm and other techniques are also performed, which show that this work can provide better performance with less hardware complexity. Finally, this compensation system is implemented in an ALTERA FPGA(APEX20K1500E) and Analog Device 12-bits dual channel ADC (AD9238). Experiment results show that IRR as high as 63 dB is achieved, which provides sufficient image rejection in both 3GPPWCDMA and MCCDMA system. This algorithm makes low-IF receiver a more attractive candidate in modern receivers.
Subjects
I/Q不平衡
低中頻式接收機
直接數位頻率合成器
direct digital frequemcy synthesizer
I/Q imbalance
Low-IF receiver
Type
thesis
File(s)![Thumbnail Image]()
Loading...
Name
ntu-93-R91942095-1.pdf
Size
23.31 KB
Format
Adobe PDF
Checksum
(MD5):017e43438d30ef20d09a8b3f4c87aa89