Transmission Line Based CMOS Low-Power Consumption Low-Noise Amplifier and Variable Delay Line in K-Band
Date Issued
2010
Date
2010
Author(s)
Ko, Pei-Chun
Abstract
There are two parts in this thesis, one is a 24 GHz low-power consumption low-noise amplifier with miniaturized size in 0.18 μm CMOS process, and the other is a 24 GHz monolithic variable delay line and two delay lines with loss compensation in 0.13 μm CMOS process. These two components are very important in K-band FMCW radar system. To reduce the chip size for systematic integration, the CCS transmission line was adopted to design the passive elements that are bulky in RF circuits. The CCS transmission line is useful for minimization of the chip size because it is flexible and meanderable during layout procedure. Moreover, the mesh ground plane also provides a good isolation between the circuit and the Si substrate.
First, this thesis proposes a 24 GHz low-power consumption low-noise amplifier with miniaturized size. Two CCS TL based transformers were used in the amplifier to reach (1) the optimal matching for input and noise impedances and (2) conjugate matching for medium stage. Moreover, the gain peaking technique was also adopted to improve the entire performance. The total size of the proposed amplifier was 0.26 mm×0.29 mm. The measured results show the gain of the amplifier was 9.2 dB with 1.8 V bias voltage and 3 mA DC current. It proves that the design is very compact and has low power consumption with higher gain. However, the noise figure was 12 dB that is different from the simulation.
The other proposed component is a 24 GHz monolithic variable delay line. The monolithic variable delay line is often operated in lower frequency. This thesis raises the operation frequency of the variable delay line from low to high by changing the load combination of the reflection type circuit. The time delay reached to 128 psec when the operation frequency was 24 GHz. However, the proposed structure results in the unavoidable insertion loss variation. Therefore, two loss compensation methods are proposed, the passive compensation and active compensation. To overcome the large insertion loss variation attributed to the non-ideal components, the passive compensation method had the identical resistors in parallel with the loads and the active compensation method had the negative impedances in series with the loads. The simulation results show that these methods both reduce the insertion loss variation under the nearly time delay, especially in the active compensation which could reduce the insertion loss variation from 7.5 dB to 0 dB.
Subjects
miniaturized low-power low-noise amplifier (LNA)
complementary-conducting-strip transmission line (CCS TL)
transformer
variable delay line
passive compensation
active compensation
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