Skip to main content
English
中文
Log In
Log in
Log in with ORCID
NTU Single Sign On
Have you forgotten your password?
Home
College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
Architecture-driven metric for simultaneous placement and global routing for FPGAs
Details
Architecture-driven metric for simultaneous placement and global routing for FPGAs
Journal
Design Automation Conference
Pages
567-572
Date Issued
2000
Author(s)
YAO-WEN CHANG
Chang, Yu-Tsang
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-0033684575&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/289949
Type
conference paper
