Design of Phase Shifter for Microwave and Millimeter-wave Applications
Date Issued
2010
Date
2010
Author(s)
Peng, Pen-Jui
Abstract
Three phase shifters in CMOS technology are implemented in this thesis. It can be used in a direct conversion system and phase array system.
The first phase shifter is applied in a 60 GHz sub-harmonic mixing direct conversion system. The LO frequency is set to be 30 GHz due to the sub-harmonic architecture. The most important problem in a direct conversion system is the IQ mismatch since the signal quality will be degraded by IQ mismatch. Reducing the IQ mismatch can increase the signal quality substantially. Therefore, a 30 GHz continuously tunable phase shifter using 65 nm CMOS technology is presented in this thesis. This phase shifter is set after the LO, dividing the LO signal into IQ paths and the IQ signals will be inserted to the IQ mixer, respectively. The IQ signals can be generated by a 45° phase shifter due to the sub-harmonic architecture. Using the continuously tunable phase shifter, this phase shifter can provide 45° ± 10° phase difference, and ±2 dB amplitude imbalance. Therefore, the IQ signals will have good match by using the phase shifter.
The second and the third phase shifters are applied in a 60 GHz phase array system. Phase array system has been widely used in nowadays communication system since the high spatial selectivity and the high array gain can improve the spectral efficiency. Since the CMOS technology have high integration, the phase array system can be applied in many respects.
The second circuit is a switching type phase shifter using 65 nm CMOS technology. Since the losses in different phase state are not the same, it will cause the amplitude error. To minimize the amplitude error of the STPS, a variable gain amplifier (VGA) can be cascaded with the phase shifter to compensate the different loss in each state.
However, when VGA provides different gain to compensate the different loss of each state, the insertion phase of the VGA will also be changed. Therefore, it is difficult to achieve low RMS phase error and low RMS gain error simultaneously. In this design, a STPS using a VGA with a new phase compensation technique is presented. The phase compensated VGA can provide variable gain without changing the insertion phase. Using the phase compensated VGA, the gain error of the STPS can be minimized without degrading the phase error. The measured RMS phase error and amplitude error are under 7.2° and 0.2 dB respectively in 60 to 66 GHz. The average amplitude is about -7 dB.
The third circuit is a vector sum phase shifter using 90 nm CMOS technology. The vector sum phase shifter can synthesize any amplitude and phase at certain frequency, so the phase error and amplitude error can be minimized. However, the vector sum phase shifter usually suffered from its narrow bandwidth since the IQ signals cannot be precise in wide frequency range. The proposed vector sum phase shifter using a wideband quadrature Wilkinson power divider to achieve low phase error in wideband. The measured RMS phase error and amplitude error are under 5° and 0.5 dB respectively in 57 to 66 GHz. The average amplitude is about -5 dB.
Subjects
CMOS
phase array system
phase shifter
variable gain amplifier
Type
thesis
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