Design and Implementation of Interface Circuits for Capacitive Sensors
Date Issued
2011
Date
2011
Author(s)
Yu-Tseng, Hsien
Abstract
This thesis illustrates the design and implementation of interface circuits for capacitive sensors. The interface circuit performs femto farad resolution, high sampling rate and wide capacitance range, which is designed for measuring the change of capacitance under physical change. With linear corresponding relationship between capacitance and output frequency, the interpolation is available in capacitance calculation. By using a standard TSMC 0.18-μm CMOS process, there are two circuits implemented.
Firstly, the switch-capacitor mixer architecture is introduced to present a linear proportional output frequency to the capacitance change. The proposed sensor interface is simply composed of an operational amplifier and two comparators for reducing the hardware cost. Secondly, the auto-adjustment mechanism is applied to resolution adaption for an unknown sensor. In order to reduce the non-ideal effect, the auto-zero and charge cancellation techniques are also employed in this design. With the digital output data provided by a counter, the raw data can be collected with a multichannel DAQ and then processed directly with a computer.
Operated at a 1.8-V supply voltage, the fabricated circuits consume a dc power less than 9.9 mW. Except the testing circuits and pads, the active areas are both less than 0.1 mm2. The functions and performance are verified in the measurement result.
Subjects
CMOS
switch-capacitor oscillator
capacitive sensor
auto-zero
capacitance-digital converter
Type
thesis
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