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Multi-Standard CMOS RF Power Amplifier Circuit Design
Date Issued
2011
Date
2011
Author(s)
Chen, Yu-Shen
Abstract
As the demand of wireless system increases rapidly, more and more wireless communication standards are used simultaneously in our lives. Therefore, a multi-standard communication system that can be integrated into a single wireless transceiver becomes an important research issue. The dominant technique to achieve highly-integrated transmitter architecture is the wideband power amplifier circuit design.
This Thesis is focused on a broadband and multi-standard RF power amplifier for 2.45GHz ISM 802.11b, 802.11g/n, Bluetooth, 3.5G UWB-WiMAX 802.16a, and 5GHz U-NII IEEE 802.11a applications. The proposed broadband and multi-standard RF power amplifier adopts a direct-conversion architecture, thus reducing chip area and power consumption by hardware sharing. The post-simulation results show that the broadband power amplifier occupies an area of 0.391 mm2, dissipating 805mW at high-gain mode with a 3.3V power supply in TSMC CMOS 0.18μm process.
The broadband power amplifier configured in 2.45G, 3.5G, and 5GHz bands is composed of three stages. The first-stage and second-stage amplifiers are based on our proposed dual-loop feedback technique [8][9][10] to reach broadband and impedance matching; they have a wideband input/output 50 ohm matching from 2GHz to 6GHz to achieve inter-stage matching with the third-stage amplifier. The third-stage amplifier is for power amplification.
This Thesis is focused on a broadband and multi-standard RF power amplifier for 2.45GHz ISM 802.11b, 802.11g/n, Bluetooth, 3.5G UWB-WiMAX 802.16a, and 5GHz U-NII IEEE 802.11a applications. The proposed broadband and multi-standard RF power amplifier adopts a direct-conversion architecture, thus reducing chip area and power consumption by hardware sharing. The post-simulation results show that the broadband power amplifier occupies an area of 0.391 mm2, dissipating 805mW at high-gain mode with a 3.3V power supply in TSMC CMOS 0.18μm process.
The broadband power amplifier configured in 2.45G, 3.5G, and 5GHz bands is composed of three stages. The first-stage and second-stage amplifiers are based on our proposed dual-loop feedback technique [8][9][10] to reach broadband and impedance matching; they have a wideband input/output 50 ohm matching from 2GHz to 6GHz to achieve inter-stage matching with the third-stage amplifier. The third-stage amplifier is for power amplification.
Subjects
Multi-Standard
Type
thesis
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Name
ntu-100-P98943002-1.pdf
Size
23.32 KB
Format
Adobe PDF
Checksum
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