System Architecture and AFE Designs DMT Transceiver
Date Issued
2002-07-31
Date
2002-07-31
Author(s)
汪重光
DOI
902218E002038
Abstract
This project is for the 2nd of the
three-year project that develops DMT-based
xDSL transceiver architecture and explores
analog front-end circuit design techniques
including two key blocks in analog front-end,
namely, tunable filter and magnitude control,
will be designed. During the first period, the
techniques of DSL transmission are studied.
The architecture of the DMT-based xDSL
transceiver is designed. The issues of VLSI
circuit, namely, architecture and
specifications, are investigated. Besides,
practical circuit design considerations on
low voltage and low power are taken into
account. In the second period, the
transceiver architecture is validated on a
basis of computer simulation in conjunction
with theoretical analysis. Moreover, analog
front-end circuits are designed and simulated.
The issues of bandwidth-tunable filtering
and magnitude control are both investigated.
Subjects
Dual-loop
Automatic Gain
Control (AGC)
Control (AGC)
Programmable Filter
VDSL
DMT
Publisher
臺北市：國立臺灣大學電機工程學系暨研究所
Type
report
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