An Integrated Driver with Dual-Edge Adaptive Dead-Time Control for GaN-Based Synchronous Buck Converter
Journal
IEEE Transactions on Industry Applications
Start Page
1
End Page
14
ISSN
0093-9994
1939-9367
Date Issued
2024
Author(s)
Giao Huu Thuc
Abstract
This paper presents an integrated gate driver for a GaN-based synchronous buck converter with a novel dual-edge adaptive dead-time control (DTC) to minimize the dead-time and the reverse conduction loss on both transition edges of the switching node voltage. Two function blocks, phase error detector (PED) and coarse/fine controller, are created to detect the real dead-time and calibrate it to the sub-ns range, respectively. The control mechanism combines both analog and digital principles. The driver IC was fabricated by TSMC 0.18 μm HVG2 process with a die area of 1.5mm2. Measurement results show that less than 1 ns dead-times are achieved in the entire load current range of 0.2 to 2 A for a 1 MHz 12-to-5V GaN-based buck converter. Thus, the measured peak efficiency reaches 94.15%.
SDGs
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Type
journal article