Design and implementation of CMOS low noise amplifiers for WLAN frequency-band applications
Date Issued
2005
Date
2005
Author(s)
Lo, Chieh-Min
DOI
en-US
Abstract
In this thesis, three low noise amplifiers (LNAs) are designed, and implemented using CMOS process. LNA is the critical component in the RF front-end circuits. It amplifies the weak RF signal from the antenna with minimum noise contribution. The conventional LNAs for microwave and millimeter-wave applications were usually implemented with high-cost and high-performance technology, GaAs or InP HEMT/HBT with large chip sizes. In recent years, the RF CMOS technology becomes mature with scaling down size of MOSFET, such that the fT in MOSFET is comparable to that in GaAs technology. Besides, the feature of CMOS such as higher integration capability with digital circuits is attractive for the system-on-chip (SOC) development.
A 5-6 GHz low noise amplifier and variable gain low noise amplifier (VGLNA) are designed and implemented using TSMC 0.18um standard CMOS process. By using helix-stacked inductors, an acceptable quality factor and self-resonate frequency are achieved with a smaller chip size. The noise figure of LNA is measured with minimum value about 2.6 dB. Another LNA, featured with current steering architecture, is implemented as a VGLNA. The ultra-wide control range about 40 dB is achieved by current steering. The VGLNA exhibits a low noise figure of 2.7 dB in the high-gain mode for one-stage design.
Besides the LNAs designed for microwave application, the millimeter-wave (V-band) CMOS LNA has been designed, measured and fabricated in TSMC 0.13um RF/MM CMOS process. It exhibits the highest gain among previously published CMOS amplifiers in the millimeter-wave frequency range. Thin-film microstripline is used for the impedance match of the circuit design. The V-band CMOS LNA exhibits small signal gain over 20 dB from 50 to 57 GHz and noise figure of 8 dB with chip size of only 0.42 mm2.
Subjects
金氧半場效電晶體
低雜訊放大器
射頻電路
CMOS
LNA
RFIC
Type
thesis
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