A low power scheduling method using dual V/sub dd/ and dual V/sub th/
Resource
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Journal
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Pages
-
Date Issued
2005-05
Date
2005-05
Author(s)
DOI
N/A
Abstract
As technology scales down to nanometer dimensions, static power consumption has become more and more important. We propose a low power method to manage power consumption; it considers dual supply voltage (V/sub dd/) and dual threshold voltage (V/sub th/) at the same time to deal with the scheduling problem in the behavioral synthesis stage. A flexible design space of power, and a better performance can be achieved when we use the proposed method. An algorithm combining GA (genetic algorithm) and SA (simulated annealing) is used to solve the scheduling problem. Experimental results illustrate 41.6% power reduction on average.
SDGs
Type
journal article
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