Research on 24 GHz CMOS Linearized Power Amplifier Using Low Frequency IM2 Feed-forward Method
Date Issued
2012
Date
2012
Author(s)
Chen, Yi-Hsin
Abstract
In this thesis, a new low-frequency IM2 feed-forward method is proposed to enhance the linearity of the 24 GHz CMOS power amplifier. The power amplifier consists of main and auxiliary paths. The main path consists of cascode topology to provide enough gain and amplify the output power. The auxiliary path consists of two transistors to provide the same IM3 current compared to the main path. The cascode current mirror and DC-level shifter are designed to feed the IM2 current in the auxiliary path. The operation detail of the linearized circuit is investigated, and the comparison of this new method versus other previous reported linearization methods is provided.
A 24 GHz power amplifier with the proposed linearization method is fabricated in 0.18-um CMOS technology. According to the measurement, the proposed PA provides 8.5-dB small signal gain, 14.4-dBm OP1dB and 17-dBm Psat. The peak power-added-efficiency (PAE) and PAE at OP1dB is 15% and 12.3%, respectively. To verify the linearization effect, the measured IM3 signal is reduced more than 20 dBc at sweet-spot. Under the 64-QAM modulation, the ACPR and EVM are improved by 8 dB and 2%, respectively. It can be verified that the linearization effect of this power amplifier.
Subjects
Power Amplifier
linearization
IMD3
Sweet-spot
Feed-forward
IM2
Type
thesis
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