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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
A 40Gb/s low-power analog equalizer in 0.13μm CMOS technology
Details
A 40Gb/s low-power analog equalizer in 0.13μm CMOS technology
Journal
2008 Symposium on VLSI Circuits
Pages
216-217
Date Issued
2006-06
Author(s)
Jian-Hao Lu
Ke-Hou Chen
SHEN-IUAN LIU
DOI
10.1109/VLSIC.2008.4585949
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/325500
SDGs
[SDGs]SDG7
Type
conference paper
