Performance-Driven Block and Input/Output Buffer Placement in Flip-Chip Design
Date Issued
2004
Date
2004
Author(s)
Chao, Wen-Chang
DOI
en-US
Abstract
The flip-chip package gives the highest chip density of any
packaging methods to support the pad-limited ASIC design. One of the most important characteristics of flip chip designs is that the input/output buffers could be placed anywhere inside a chip. For most practical designs, we have to control the timing of the input/output signals. This can be achieved through controlling the positions of bump balls, input/output buffers, and first-stage/last-stage cells in a flip chip. Specifically, we intend to minimize the path length between blocks and bump balls
as well as the delay skew of the paths. In this thesis, we propose a two-stage placement method for the block and input/output buffer placement in flip-chip design. In the first stage, we apply simulated annealing using the B*-tree representation to minimize the maximum wirelength and obtain an initial feasible placement. In the second stage, we apply an iterative algorithm to improve the initial solution. In each iteration, we find the zero-skew position for each buffer to minimize the signal delay skew between the buffer and one with the maximum signal delay. The iterative improvement terminates when all of the signal delay skews of input/output buffers are under an user-specified range. Compared with the placement using the B*-tree alone and the work in [16], our method obtains significantly better results. The B*-tree based algorithm ([16]) results in overall cost of 32.23 times (14.08 times) of that of our algorithm. In terms of running time, the B*-tree based algorithm ([16]) needs 15.34 times (10.47 times) of our CPU time. In particular, setting an appropriate grid size and a signal skew range, we can even get a placement with zero signal skews for all input/output buffers.
Subjects
覆晶
輸入/輸出
緩衝器
擺置
placement
input/output
buffer
I/O
flip-chip
Type
thesis
File(s)![Thumbnail Image]()
Loading...
Name
ntu-93-R91943067-1.pdf
Size
23.31 KB
Format
Adobe PDF
Checksum
(MD5):f4affc5b396ca2cf33fda75ed37c8021