Performance analysis of a generic GMPLS switching architecture with flush capability
Resource
Communications, 2002. ICC 2002. IEEE International Conference on
Journal
IEEE International Conference on Communications
Journal Volume
2
Pages
1006-1010
Date Issued
2002-05
Date
2002-05
Author(s)
Kao, Ling-Chih
Abstract
The performance of a GMPLS switching architecture with the flush capability is studied. For this switching architecture, we propose a queueing model that includes the control plane, the switching buffer mechanism, and the flush mechanism. The flush capability is included to reduce the out-of-sequence problem due to dynamic path changes. The behavior of aggregated streams, the label-setup and release policies, and the mechanisms for efficient resource allocation are all covered. With the proposed model, one can select appropriate parameters for the label-setup policy and the label-release policy to match the traffic load and network environment. Key performance metrics, such as the throughput, the label-setup rate, and the fast path bandwidth utilization, can all be evaluated by this mathematical model. Numerical results and simulations are used to verify the accuracy of our proposed queueing model. Finally, the trade-off among these performance metrics can be observed as well.
Subjects
GMPLS; Performance analysis; Routing; Switching
SDGs
Other Subjects
Bandwidth; Buffer storage; Computer simulation; Electric network topology; Mathematical models; Network protocols; Packet networks; Queueing networks; Queueing theory; Resource allocation; Switching systems; Telecommunication traffic; Generalized multi-protocol lamda switching (GMPLS); Packet switching
Type
journal article
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