A scalable built-in self-test/self-diagnosis architecture for 2D-mesh based chip multiprocessor systems
Journal
IEEE International Symposium on Circuits and Systems
Pages
2317-2320
Date Issued
2009
Author(s)
Abstract
In this paper, we proposed a scalable built-in self-test/self-diagnosis architecture, surrounding test ring (STR), to detect and locate faulty FIFOs and faulty MUXs for 2D-mesh based CMP systems. Proposed STR supports 97.79% fault coverage in FIFOs and MUXs and tests with 388 ~ 2886 test cycles in different testing methods and mesh sizes.
SDGs
Type
conference paper