Corner-Stitching-and-Corner-Sequence-Based Routability-Driven Blockage-Aware Macro Placement

Routability of nets has become an important concern in modern digital circuit design. A placement solution with bad routability may cause congestion of nets and thus time is wasted in iterations between placement stage and routing stage. Another important concern in macro placement is blockage, or pre-placed macros. Previous works of macro placement handle boundary blockage well, but cannot cope with non-boundary blockage effectively. Though some works of analog placement are designed for non-boundary blockage, they cannot be applied to digital circuit design directly. By borrowing the concept of manual placement and integrating corner stitching, corner sequence and quadtrees together, the proposed method of this paper can deal with both boundary and non-boundary blockage effectively with average case linear time complexity, and at the same time keep good routability result for macro placement. Because the proposed method guarantees placing macros without overlap, simulated annealing can be sped up by focusing on finding the best result among valid solutions. However, experiments for comparing running time with previous works are not yet performed and thus the research of this paper is not complete.