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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Analysis and modeling of bang-bang clock and data recovery circuits
Details
Analysis and modeling of bang-bang clock and data recovery circuits
Journal
IEEE Journal of Solid-State Circuits
Journal Volume
39
Journal Issue
9
Pages
1571-1580
Date Issued
2004
Author(s)
Lee, J.
Kundert, K.S.
Razavi, B.
JRI LEE
DOI
10.1109/JSSC.2004.831600
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/501739
URL
https://www.scopus.com/inward/record.uri?eid=2-s2.0-4444242900&doi=10.1109%2fJSSC.2004.831600&partnerID=40&md5=bbe3adbc8ea457fa0c0e7227f320c07a
Type
conference paper