Approximate Adder Tree Design with Sparsity-Aware Encoding and In-Memory Swapping for SRAM-based Digital Compute-In-Memory Macros
Part Of
2024 IEEE 6th International Conference on AI Circuits and Systems, AICAS 2024 - Proceedings
Start Page
362
End Page
366
ISBN (of the container)
979-835038363-8
Date Issued
2024-04-22
Author(s)
Event(s)
6th IEEE International Conference on AI Circuits and Systems, AICAS 2024
Publisher
IEEE
Type
conference paper