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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Design and implementation of JPEG 2000 codec with bit-plane scalable architecture
Details
Design and implementation of JPEG 2000 codec with bit-plane scalable architecture
Journal
2006 IEEE Workshop on Signal Processing Systems Design and Implementation, SIPS
Pages
428-433
Date Issued
2006
Author(s)
Chang, Y.-W.
Chen, C.-C.
Chen, C.-C.
Fang, H.-C.
Chen, L.-G.
LIANG-GEE CHEN
DOI
10.1109/SIPS.2006.352621
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-46249133815&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/321226
SDGs
[SDGs]SDG7
Type
conference paper