Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVC
Resource
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Journal
Proceedings - IEEE International Symposium on Circuits and Systems
Pages
1790 - 1793
Date Issued
2005-05
Date
2005-05
Author(s)
DOI
N/A
Abstract
Due to the multi-frame motion estimation (ME), H.264/AVC requires ultra high memory bandwidth. Conventional Multiple Reference frames Single Current macroblock (MRSC) scheme only considers the data reuse within one frame, requiring on-chip memory size and off-chip memory bandwidth in proportional to the number of reference frames. In this paper, a Single Reference frame Multiple Current macroblocks (SRMC) scheme is presented to further exploit the data reuse between multiple frames. With rescheduling of the macroblock (MB) procedures at frame level, one loaded search window can be utilized by multiple currentMBs in different frames. The demanded memory size and bandwidth for multi-frame ME can thus be reduced to those of MRSC scheme with only one reference frame. Moreover, based on SRMC, a system architecture for H.264/AVC encoding is proposed. For HDTV specifications, 62.21KB (74.8%) of SRAM and 364.3MB/s (62.6%) of system bandwidth are saved in comparison with MRSC scheme. © 2005 IEEE.
Event(s)
IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005
Other Subjects
Data reuse; H.264/AVC; Macro block; Memory size; Multi-frame; Multi-frame motion estimation; Multiple currents; Multiple-frame; Multiple-reference frames; Off-chip memories; On chip memory; Reference frame; System architectures; System bandwidth; Ultra-high; Bandwidth; Composite micromechanics; Digital television; Error correction; Image quality; Motion Picture Experts Group standards; Television broadcasting; Motion estimation
Type
conference paper
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