Local Grouping Algorithm for Synthesizing Low-Cost Parameter Extractor of Low-Power Pre-computation-Based Content Addressable Memory
Date Issued
2009
Date
2009
Author(s)
Lai, Tsung-Sheng
Abstract
Content addressable memory (CAM) plays an important role on the performance of some devices due to the high speed of CAM. But the power consumption of CAM is also high. In this work, we propose a synthesis algorithm to synthesize the parameter extractor for low-power pre-computation-base CAM (PB-CAM) such that the data can be mapped to parameters uniformly and the cost of the parameter extractor can also be lower. Moreover, we also propose a method to reduce the impact on mapping data to parameters when most data are identical in some data blocks. In the experimental results, the average reduction of the power consumption can achieve 58.88% and the number of CMOS transistors can save 0.53% when compared with Gate-Block Selection algorithm. If the Gate-Block Selection algorithm is also enhanced by our proposed discard and interlaced method (DAI method) then the power consumption can still be reduced by 13%.
Subjects
content addressable memory (CAM)
pre-computation
low power
low cost
synthesis algorithm
Type
thesis
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