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  4. Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs
 
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Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs

Journal
International Symposium on Physical Design
Pages
5-12
Date Issued
2009
Author(s)
Lee, W.-P.
Marculescu, D.
YAO-WEN CHANG  
DOI
10.1145/1514932.1514936
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-70349116034&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/350355
Abstract
The multiple-supply voltage (MSV) design style has been extensively applied to mitigate dynamic-power consumption. The MSV design paradigm, however, brings many crucial challenges, especially in the power-ring synthesis. Unlike the previous works that form the power rings as the enclosing bounding boxes of voltage islands, we enable power rings alignment to the outer boundaries of voltage islands. With this new formulation, the power-ring estimation becomes more accurate during floorplanning, and the power-ring synthesis is more practical after floorplanning. In this paper, we first propose a linear-time voltage-island power-ring search algorithm to identify the power rings of voltage islands and then present a linear-time optimal power-ring corner-patching algorithm to minimize the number of corners in the power rings by using post-floorplanning whitespaces. Experimental results first demonstrate that reducing corners in power rings significantly mitigates IR drop, and then show that the proposed algorithm can reduce the number of corners by 33% on average for the GSRC floorplan benchmarks. In particular, the total running time for the 16 GSRC benchmarks is less than one second on an AMD-64 machine with a 2.2 GHz CPU and 8 GB memory.
Type
conference paper

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