A wide-range and fixed latency of one clock cycle delay-locked loop

Journal

IEEE International Symposium on Circuits and Systems

Pages

49-52

Date Issued

2002

Author(s)

Chang, Hsiang-Hui

Lin, Jyh-Woei

DOI

URI

Type

conference paper

File(s)

Name

01010314.pdf

Size

449 KB

Format

Adobe PDF

Checksum

(MD5):24c6e6b18c174c5deed93b582cbf9c96