A 0.5-V 1.9-GIk low-power phase-locked loop in 0.18-μm CMOS

Journal

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Pages

164-165

Date Issued

2007

Author(s)

Hsieh, H.-H.

Lu, C.-T.

DOI

10.1109/VLSIC.2007.4342699

URI

https://scholars.lib.ntu.edu.tw/handle/123456789/498226

URL

https://www.scopus.com/inward/record.uri?eid=2-s2.0-39749108910&doi=10.1109%2fVLSIC.2007.4342699&partnerID=40&md5=f4d1f75a4c2be78f79476c7b0476cc43

Type

conference paper