A 2 V clock synchronizer using digital delay-locked loop

Resource

ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on

Journal

Second IEEE Asia Pacific Conference on ASICs

Pages

-

Date Issued

2000-08

Date

2000-08

Author(s)

Hwang, Chorng-Sii

Chung, Wang-Chih

Wang, Chih-Yong

DOI

DOI

N/A

URI

Type

journal article

File(s)

Name

00896916.pdf

Size

346.75 KB

Format

Adobe PDF

Checksum

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