Hardware-Software Co-Design (I)
Date Issued
1999-07-31
Date
1999-07-31
Author(s)
DOI
882215E002037
Abstract
Recently, due to the progress of VLSI
design and fabrication technologies, the
functions of electronic components
become more and more complicated.
Thus, the complexity of design
increases much rapidly. A system-onchip
usually comprises of a processor
core, application-specific instruction set
processor (ASIP), some ASICs,
memory, interface, and their interconnections.
A system designer is
required to optimally divide the
application tasks into software (S/W)
and hardware (H/W) components and to
distribute them to the processor core (or
ASIP) and ASIC, respectively.
Nowadays, little CAD tools are
designed for the H/W-S/W co-design,
leading to low productivity and long
development time. The main research
objectives of H/W-S/W co-design are as
follows: (1) define a language suitable
for H/W-S/W specifications, (2)
accomplish the H/W-S/W partitioning,
and (3) need a H/W-S/W co-simulation
environment to evaluate the correctness
and efficiency of the H/W-S/W
partitioning and synthesis results.
Publisher
臺北市：國立臺灣大學電機工程學系暨研究所
Type
report
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