A Frequency Synthesizer and Low-noise Amplifiers for Wireless Communication
Date Issued
2009
Date
2009
Author(s)
Wang, Yu-Hsiang
Abstract
A fractional-N frequency synthesizer with charge pump calibration technique is implemented in TSMC 0.18um CMOS technology. The CP mismatch due to channel-length modulation is eliminated because we use the same CP during calibration process. The measured output reference spur is -82dBc and improved by 26 dB after the calibration is done. Quadrature outputs can be generated from 2.125 to 2.575GHz. The minimum frequency step is less than 1Hz due to a 24-bit ΔΣ modulator. The measured phase noise is -114 dBc/Hz at an offset frequency of 1 MHz. All the related specifications are met in the application for Bluetooth. In addition, two reconfigurable multiband LNAs are proposed to conquer the AM blocker problem suffered in the conventional multi-standard RF front-end designs. The concept is dividing a “wideband” into several “narrowbands” by applying tunable active core. The first LNA is for all SDR band and the second LNA covers applications in 1.9 to 5.8GHz. Both of two LNAs are implemented in UMC 90nm process. The measured noise figure is from 2.0 to 3.6 dB and the measured IIP3 is from -0.5 to -4.8 dBm throughout the whole band of interest.
Subjects
fractional-N
frequency synthesizer
charge pump calibration
multiband
low-noise amplifier
Type
thesis
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