An Efficient FTL Design for Multi-Chipped Solid-State Disks
Date Issued
2009
Date
2009
Author(s)
Lu, Wei-Lun
Abstract
Although solid-state disks seem being excellent alternatives to replace hard disks in mobile devices, serious challenges arise due to performance and reliability concerns. This work targets performance enhancement designs with the considerations of low-cost MLC flash memory. In particular, an efficient flash management design is proposed to manage multi-chipped flash memory with cache support, where a two-level address translation mechanism is presented with an adaptive caching policy. The capability of the proposed approach is evaluated with a SystemC-based solid-state-drive simulator based on realistic workloads and benchmarks. It was shown that the proposed approach could significantly improve the performance of multi-chipped solid-state disks over various hardware configurations.
Subjects
Solid-State Disk
FTL
Type
thesis
File(s)![Thumbnail Image]()
Loading...
Name
ntu-98-R96922018-1.pdf
Size
23.32 KB
Format
Adobe PDF
Checksum
(MD5):4590d5cd031691ca8df9fa34cee76050