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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Modeling and simulation of negative capacitance gate on Ge FETs
Details
Modeling and simulation of negative capacitance gate on Ge FETs
Journal
ECS Transactions
Journal Volume
75
Journal Issue
8
Pages
461-467
Date Issued
2016
Author(s)
Liao, Y.-H.
Fan, S.-T.
CHEE-WEE LIU
DOI
10.1149/07508.0461ecst
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/502131
URL
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84991670425&doi=10.1149%2f07508.0461ecst&partnerID=40&md5=a2379bd05c6f69bd7d26c19b9a2ef970
Type
conference paper