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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Yield-driven, false-path-aware clock skew scheduling
Details
Yield-driven, false-path-aware clock skew scheduling
Journal
IEEE Design and Test of Computers
Journal Volume
22
Journal Issue
3
Pages
214-222
Date Issued
2005
Author(s)
Tsai, J.-L.
Baik, D.H.
Chen, C.C.-P.
Saluja, K.K.
CHUNG-PING CHEN
DOI
10.1109/MDT.2005.75
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/501055
URL
https://www.scopus.com/inward/record.uri?eid=2-s2.0-21244454885&doi=10.1109%2fMDT.2005.75&partnerID=40&md5=645f09218ff59a126aadecb9ad1d9808
Type
journal article