Design of Highly Energy-Efficient Continuous-Time Delta-Sigma Modulators
Date Issued
2015
Date
2015
Author(s)
Weng, Chan-Hsiang
Abstract
To achieve highly energy-efficient designs of continuous-time delta-sigma modulators (CTDSMs), the thesis proposes several new techniques and applies those to the loop filter, quantizer and linearization circuits used in the feedback DAC. In the first part of the thesis, a power-efficient CTDSM employing a single-amplifier biquad (SAB)-based loop filter topology and a time-domain quantizer is proposed. With single amplifier and the modified twin-T passive feedback network, the proposed SAB-based loop filter can achieve 2nd-order resonating function and feedforward path concurrently. By choosing the feedback node properly, the excess loop delay compensation path can be realized without additional hardware. Meanwhile, to resolve the nonlinearity issue of feedback DAC and lower the power consumption of the quanitzer, a time-domain quantizer embedded with data-weighted-averaging (DWA) function is proposed to replace a flash-type quantizer and DWA shuffling logics. The proposed quantizer can digitize the analog output signal of the loop filter and linearize the feedback digital-to-analog converter concurrently. Based on the first design, the second part of the thesis proposed a CTDSM employing a 2-step time-domain quantizer to further reduce the power consumption and hardware cost. In the third part of the thesis, the CTDSM adopted two SAB-baed filters with two different T networks to achieve the 4th-order noise shaping. A flash-type quantizer with the interpolating technique is used to digitize output of the loop filter. Furthermore, a random-skipped incremental data weighted averaging (RS-IDWA) function is proposed to address the linearity issue of quantizer and feedback DAC. Fabricated in 90-nm CMOS and operated at 300MHz, 256MHz and 320MHz, the proposed CTDSMs can achieve peak SNDR of 67.2 dB, 69.6 dB, and 68.1 dB over a 8.5 MHz, 8 MHz and 13 MHz signal bandwidth, respectively.
Subjects
delta-sigma modulator
analog to digital converter
time-domain quantizer
data weighted averaging
random-skipped data weighted averaging
excess loop delay
single amplifier biquad
Type
thesis