3.6mW D-band divide-by-3 injection-locked frequency dividers in 65nm CMOS
Journal
IEEE Asian Solid-State Circuits Conference (A-SSCC)
Pages
93-96
Date Issued
2011-11
Author(s)
Abstract
Two 3.6mW D-band divide-by-3 injection-locked frequency dividers (ILFDs) are realized in a 65nm CMOS process. The power consumption is 3.6mW for a supply of 1.2V. By using a second-harmonic enhancement technique, a divide-by-3 ILFD achieves a locking range of 130.01~132.4GHz. To the authors' best knowledge, this is the first divide-by-3 CMOS ILFD to work at D band.
SDGs
Type
conference paper